I first learned about semiconductor test after accepting a position as a test engineer in the IC business unit of Hewlett-Packard some 20 years ago. I had just earned my BSEE at the University of Michigan and was excited to be heading to the famed Silicon Valley to start my career.  At HP, I learned the increasingly rare art of debug while working on custom analog devices that would oscillate if you looked at them in the wrong way.  I also learned the value of innovation and non-conventional thinking, having to test 2 Gsps sampler ICs (for oscilloscopes) on a 20 MHz Sentry Series-80 test system.  This work and mindset, further augmented by concurrent work on my MSEE at Stanford University, led to my first patent and first of several papers related to semiconductor test.  Having known nothing about test just a few years earlier, I was now hooked.

         Following two years managing the test department of GEC-Plessey Semiconductors (now Zarlink) over the "hill" in Scotts Valley, I joined Teradyne in Austin, TX as a technical sales specialist.  Seeing the test floors of some of the semiconductor industry's leading companies, I discovered a new world of high-volume manufacturing and the test-related challenges of large, multi-national corporations.  The alleged "irrational exuberance" of that era was no stranger to semiconductors, amplifying the already high-stakes nature of the ATE business. At the peak of that era, our single-account sales team delivered an incredible two-year bookings total approaching US$450 million, surpassing the entire revenue of some smaller competitors.  The addition of new and intriguing business challenges to familiar technical challenges led me to pursue more skills in the former area by obtaining an Executive MBA at the University of Texas.  It was then, around the summer of 2000, when I first had a twinkling in my eye regarding the future of test capacity management.

          Closely supporting a major customer through its transition to an "asset light" manufacturing model, I experienced first-hand an analogue of the broader industry's shift to outsourced manufacturing.  I saw how test outsourcing logically followed assembly outsourcing, with each expected to deliver economies-of-scale returns similar to those generated by the industry's pioneering foundry model.   But ay, there's the rub: test capacity configurations and cycle times are characteristically device-dependent, thus preventing the outsourced test model from scaling like the outsourced fab and assembly models, both comprising relatively uniform capacity.  This unique complexity makes test capacity, well, un-manageable - significantly constraining the requisite aggregation and utilization efficiencies of any successful test operation, for SATS companies and IDMs alike.  I knew that these inefficiencies would continue to plague the semiconductor test industry unless its leaders invested in a solution.

         In 2000 and the few years following, however, test business managers were not ready to make this investment.  Business goals of a typical test house were largely centered on market share and revenue growth, prioritizing test capacity availability over its long-term ROI. While back again in California working with both established and emerging fabless companies and their outsourcing partners, I saw the semiconductor test industry continue to mature and its managers beginning to drive economic profitability through a focus on a test operation's leading value component - asset ownership - emphasizing capex discipline and equipment utilization.   ATE differentiation, too, evolved to a point where functionality and even cost-of-test are today often discounted as the "same" for all viable alternatives, with final selection based more on a new order of benefits that provide manufacturing flexibility amid shrinking time-to-market and product life cycles.  These recent changes together lead to one conclusion:  today's marketplace demands that the test value chain leaders - from test specifiers, test providers, and test equipment suppliers alike - take action to optimize test capacity specification, planning, and trading - that is, optimize test capacity management.    

         While I may at times long for the "simple" days of searching for the right capacitor to stabilize my probecard, I am excited to know that the future of test capacity management is NOW!  I am looking forward to seeing Chip Nexus deliver its innovative and valuable test capacity management solutions to the semiconductor test industry.


Best regards,

 
Dan Hamling
Founder